1. Field of the Invention
The present invention relates to an image pickup apparatus using an image pickup device, such as a CCD or CMOS image sensor, and more particularly to an image pickup apparatus characterized by a technique which makes it possible to improve both the feeling of use of the image pickup apparatus and the image quality of a picked-up image.
2. Description of the Related Art
Recently, image pickup apparatuses, such as digital cameras and video cameras, using an image pickup device like a CCD/CMOS image sensor (CMOS area sensor) have come into widespread use.
Some image pickup apparatuses are capable of operating in a plurality of shooting modes, and many of the shooting modes involve changes in shooting speed and continuous shooting speed. For example, a single-shot mode in which a single-shot operation is performed by pressing a shutter switch only once, and a continuous shooting mode in which a shooting operation is continuously repeated until the shutter switch is released (see e.g. the “abstract” of Japanese Patent Laid-Open Publication No. 2001-268453).
As for the continuous shooting mode, much importance is placed on the continuous shooting speed for the purpose of sports shooting and the like.
By the way, it is generally known that an image pickup operation by an image pickup apparatus, such as a digital camera or a video camera, using an image pickup device is executed by a sequence of operations of charge accumulation in the image pickup device—charge transfer to a downstream part and signal reading therefrom.
The image pickup operation will be described with reference to FIGS. 14 and 15.
FIG. 14 is a circuit diagram of the general configuration of a pixel section of a CMOS area sensor.
As shown in FIG. 14, in each pixel, there are arranged a photodiode (PD) 14-1, a transfer switch (TX) 14-2, a reset switch (TRES) 14-3, a source follower (SF) 14-10 as a pixel amplifier, and a line selection switch (TSEL) 14-6.
The transfer switch (TX) 14-2 has a gate thereof connected to a control line FTX (n, n+1) from a vertical scanning circuit 14-14, and the reset switch (TRES) 14-3 has a gate thereof connected to a control line FRES (n, n+1) from the vertical scanning circuit 14-14. Further, the line selection switch (TSEL) 14-6 has a gate thereof connected to a control line FSEL (n, n+1) from the vertical scanning circuit 14-14.
Further, a gate 14-11 (floating diffusion (FD) gate; hereinafter also referred to as “FD”) of the source follower (SF) 14-10 is connected to the transfer switch 14-2, the reset switch 14-3, and a capacitor 14-9.
Photoelectric conversion is performed by the photodiode 14-1, and the transfer switch 14-2 is held off during photoelectric charge accumulation. This prevents electric charge obtained through photoelectric conversion by the photodiode 14-1 from being transferred to the gate 14-11 of the source follower 14-10 which forms a pixel amplifier.
However, when an object is a high luminance object, the amount of electric charge accumulated in the photodiode 14-1 can exceed the saturation level of the transfer switch 14-2, causing leakage of electric charge into the gate 14-11 of the source follower 14-10.
When a comparator detects that the potential of charge leaked to the gate 14-11 of the source follower 14-10 has reached a predetermined level, the output of the comparator turns on. Then, a signal is transmitted to the input of an OR element, and the OR element transmits to a memory controller the signal as one indicating an area (line) where charge leakage has occurred.
The gate 14-11 of the source follower 14-10 forming the pixel amplifier basically has its voltage initialized to an appropriate level by turn-on of the reset switch 14-3 before starting of charge accumulation. This voltage level provides a dark level.
When the line selection switch 14-6 is turned on subsequently or simultaneously, a source follower section formed by a load current source 14-7 and the pixel amplifier (source follower 14-10) are brought into an operating state. When the transfer switch 14-2 is turned on at this time, electric charge accumulated in the photodiode 14-1 is transferred to the gate 14-11 of the source follower 14-10 as the pixel amplifier. Reference numeral 14-4 denotes a reset power supply, and 14-5 a power supply for driving the source follower 14-10.
At this time, outputs from a selected line are generated on a vertical output line. The outputs are each accumulated in a signal accumulator 14-15 via a transfer gate 14-15a or 14-15b. The outputs temporarily stored in the signal accumulator 14-15 are sequentially read out into an output amplifier section by a horizontal scanning circuit 14-16.
FIG. 15 is a timing diagram useful in explaining general operational timing in the CMOS area sensor shown in FIG. 14.
First, reset of the pixel section is started at time TO. At time TO, the control lines FTX(n), FTX(n+1), FRES(n), and FRES(n+1) are asserted. In this state, electric charge in the cathode of the photodiode 14-1 has moved to the gate 14-11 of the source follower 14-10, and is averaged. By increasing the capacitive component of the capacitor 14-9 of the gate (FD gate) 14-11 of the source follower 14-10, the potential of the averaged electric charge becomes substantially equal to the level as obtained when the cathode of the photodiode 14-1 is reset.
Then, at time T1, the control lines FTX(n), FTX(n+1), FRES(n), and FRES(n+1) are negated. In this timing, charge accumulation is started. However, a mechanical shutter, not shown, remains closed.
Then, at time T2, the mechanical shutter, not shown, for guiding light from an object image opens to start an actual exposure operation. The mechanical shutter is closed at time T3. In other words, a time period T2 to T3 corresponds to an exposure period (charge accumulation period) in the image pickup apparatus.
It should be noted that when leakage of electric charge into the gate 14-11 of the source follower 14-10 occurs during an exposure period (charge accumulation period) due to an exposure to a high-luminance object and the potential of the accumulated electric charge exceeds the predetermined level, a determination unit (the comparator, a comparison potential, and the OR element) performs information transmission to the memory controller. This causes information on a line where charge leakage has occurred, i.e. information on a saturated line to be stored.
After time T4, line-by-line transfer operations are started. More specifically, reading operations for an n-th line, an (n+1)-th line, and so forth are sequentially performed.
At time T4, the control line FSEL(n) is asserted to turn on the line selection switch 14-6, whereby each of the source followers 14-10 of all pixels arranged in the n-th line is brought into an operating state. At the same time, the control line FTN(n) is asserted to keep the transfer gate 14-15b on until time T7.
In this timing, the transfer gate 14-15b starts charge transfer to the signal accumulator 14-15. Then, at time T5, the control line FRES(n) is asserted, to turn on the reset switch 14-3, whereby electric charge in the gate 14-11 of the source follower 14-10 is initialized, i.e. set to the dark level.
The reset switch 14-3 is turned off at time T6, and stabilization of the electric charge in the gate 14-11 of the source follower 14-10 at the dark level is awaited during a time period Tn from T6 to T7.
Next, the control line FTN(n) is negated at time T7. This timing corresponds to a time at which the transfer of the electric charge at the dark level to the signal accumulator 14-15 is terminated. This operation is carried out simultaneously in parallel for all the pixels arranged in the n-th line.
A time period T4 to T7 (including the stabilization-awaiting time period Tn) over which a signal output at the dark level is transferred to the signal accumulator 14-15, awaited to be stable, and held is referred to as the “N reading” period.
After the dark-level charge transfer to the signal accumulator 14-15 (N reading) is terminated (T7), at time TB, the control line FTS is asserted only during a time period T8 to T11 to keep the transfer gate 14-15b on until T11. In this timing, the transfer gate 14-15b starts to transfer electric charge to the signal accumulator 14-15.
Then, at time T9, the control line FTX(n) is asserted to turn on the transfer switch 14-2, whereby signal charge accumulated in the photodiode 14-1 is transferred to the gate 14-11 of the source follower 14-10.
At this time, the potential of the gate 14-11 of the source follower 14-10 changes from the initialized level (dark level) by an amount corresponding to the received signal charge to thereby finally define the signal level.
The transfer switch 14-2 is turned off at time T10, but stabilization of the electric charge in the gate 14-11 of the source follower 14-10 is awaited during a time period Ts from T10 to T11.
Next, the control line FTS (n) is negated at time T11. This timing corresponds to a time at which the transfer of the electric charge at the signal output level to the signal accumulator 14-15 is terminated. This operation is carried out simultaneously in parallel for all the pixels arranged in the n-th line.
A time period T8 to T11 (including the stabilization-awaiting time period Ts) over which a signal output at the output signal level is transferred to the signal accumulator 14-15, awaited to be stable, and held is referred to as the “S reading” period. The total time period of the “N reading” period and the “S reading” period is referred to as “the charge transfer period”.
At a time point (T11) when the operation in the charge transfer period is terminated, the signal accumulator 14-15 stores the dark level and the signal level of each of all the pixels arranged in the n-th line, and the difference between the dark level and the signal level of each pixel is obtained.
This cancels fixed pattern noise (FPN) caused by variation in a threshold voltage Vth between the source followers and KTC noise made by the reset switch 14-3 at a reset time, whereby it is possible to obtain signals having a high S/N ratio with noise components removed therefrom.
The horizontal scanning circuit 14-16 horizontally scans dark-level and signal-level difference signals accumulated in the signal accumulator 14-15 and outputs them in a time-series manner at a time period from time T11 to time T12. This completes output from the n-th line.
Similarly, the control lines FSEL(n+1), FRES(n+1), FTX(n+1), FTN, and FTS are driven as shown in FIG. 15, whereby signals in the (n+1)-th line can be read out as from the n-th line.
As described above, in a shooting process executed by the image pickup apparatus using the CMOS area sensor, in order to convert an electric charge generated in the photodiode into a signal voltage and read out the signal voltage into the output amplifier, there is provided the aforementioned charge transfer period formed by the “N (noise/dark) reading” period for transferring a noise component to the signal accumulator and the “S (signal) reading” period for transferring a signal component to the signal accumulator.
The charge transfer period includes a time period for awaiting stabilization of a power supply voltage which is changed by switch on/off of the transfer gate or the like. Therefore, when the charge transfer period is too short, charge transfer has to be performed before the power supply voltage is stabilized, which can cause degradation of the image quality of a recorded image.
Particularly in a high-luminance portion, a large amount of electric charge moves, and hence variation in power supply voltage is apt to occur. Therefore, e.g. when a scene with a small high-luminance object in the dark is photographed, if the charge transfer period is short, N reading and S reading are performed in a state where the power supply has not been stabilized yet.
As a result, in a dark-pixel/optical black (OB), there is produced a difference in output voltage level between a line having a high-luminance portion area and a line having no such high-luminance portion, which causes generation of a whitish belt (smear) around the high-luminance portion (see e.g. “Problems to be Solved” in Japanese Patent Laid-Open Publication No. 2001-230974).
Therefore, it is ideal that the charge transfer period is set to a time period including sufficient time for stabilization of the power supply. However, when an image pickup apparatus has a continuous shooting mode (particularly a high-speed continuous shooting mode), repeating time (continuous shot frame speed-dependent time (hereinafter referred to as “recycle time”)) is also required. For this reason, it is general that an appropriate charge transfer period is selected and fixedly set in consideration of the allowable range of image quality and the recycle time.
However, if the image transfer period for a whole image (i.e. all lines) is sufficiently extended so as to prevent degradation of image quality in a high-luminance portion of an object, it is inevitably required to increase recycle time. In particular, a digital single-lens reflex camera with the aim of obtaining high image quality and high resolution requires an increased number of pixels, which inevitably causes an increase in the number of lines and extension of the charge transfer period. When the charge transfer period is extended, a time period corresponding to the increased number of lines has an influence on the recycle time, which seriously degrades snapshot performance.
As means for avoiding the above problem, it is proposed to change the charge transfer period according to the brightness of an object (see Japanese Patent Laid-Open Publication No. 2005-323108).
However, in Japanese Patent Laid-Open Publication (Kokai) No. 2005-323108, depending on the result of brightness measurement of an object by an external photometer, if a high-luminance portion is detected, the charge transfer period corresponding to all lines of an image is extended and hence continuous shooting e.g. of an illuminated object is performed with the charge transfer period extended for all lines. Therefore, there remains room for improvement of snapshot performance.